Mclkout Setting - Analog Devices Advantiv ADV7604 Hardware Manual

Component/graphics digitizer with 4:1 multiplexed hdmi receiver
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I2SOUTMODE[1:0], I
Function
I2SOUTMODE[1:0]
00
01
10
11
Notes:
I2SOUTMODE
streams. This is the case in the following situation:
The ADV7604 receives audio sample packets
The ADV7604 receives HBR packets,
MUX_HBR_OUT
In HBR mode, it is required that the part outputs four SPDIF, I
encapsulating a 24-bit audio sample word. Therefore,
0b11000.

7.16.5 MCLKOUT Setting

The audio master clock MCLKOUT is set using the MCLKFS_N[2:0] register, as shown in
Equation
5.
Equation 5: Relationship Between MCLKOUT, MCLKFS_N, and f
MCLKFS_N[2:0] , AFE Map, Address 0xB5, [2:0]
Function
MCLKFS_N[2:0]
000
001
010
011
100
101
110
111
Rev. F August 2010
2
S Output Mode Selection, HDMI Map, Address 0x03, [6:5]
Description
2
I
S mode.
2
Right I
S justified.
2
Left I
S justified.
Raw IEC60958 mode. Outputs AES3 streams.
is effective when the ADV7604 is configured to output I2S streams or AES3
is set to 0b00, or 0b01, or 0b10 or 0b11
=
(
MCLKOUT
Description
128 fs
256 fs
384 fs
512 fs
640 fs
768 fs
Reserved
Reserved
OVR_ MUX_HBR
I2SBITWIDTH
+
×
_
) 1
128
MCLKFS
N
138
is set to 1, and
2
S, or raw IEC60958 streams
should always be set to
×
f
s
s
ADV7604

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