Protocol For Main I C Port; Table 93: Register Maps And I - Analog Devices Advantiv ADV7604 Hardware Manual

Map
IO Map
AVLink Map
CEC Map
InfoFrame Map
ESDP Map
DPP Map
AFE Map
Repeater Map
EDID Map
HDMI Map
Test Map
CP Map
VDP Map
16.1.2 Protocol for Main I
The system controller initiates a data transfer by establishing a start condition, defined by a high to
low transition on SDA while SCLK remains high. This transition indicates that an address/data
stream will follow. All peripherals respond to the start condition and shift the next eight bits (7-bit
address and R/W bit). The bits are transferred from MSB down to LSB. The peripheral that
recognizes the transmitted address responds by pulling the data line low during the ninth clock
pulse. This is known as an acknowledge bit. All other devices withdraw from the bus at this point
and maintain an idle condition.
In the idle condition, the device monitors the SDA and SCLK lines for the start condition and the
correct transmitted address. The R/W bit determines the direction of the data. A logic 0 on the LSB
of the first byte means that the master will write information to the peripheral. A logic 1 on the LSB
of the first byte means that the master will read information from the peripheral.
Each of the ADV7604 maps acts as a standard slave device on the bus. The data on the SDA pin is
eight bits long, supporting the 7-bit addresses plus the R/W bit. It interprets the first byte as the map
address and the second byte as the starting subaddress. The subaddresses auto increment, allowing
data to be written to or read from the starting subaddress. A data transfer is always terminated by a
stop condition. The user can also access any unique subaddress register on a one-by-one basis
without having to update all the registers.
Stop and start conditions can be detected at any stage during the data transfer. If these conditions
are asserted out of sequence with normal read and write operations, these cause an immediate jump
to the idle condition. During a given SCLK high period the user should issue only one start
condition, one stop condition, or a single stop condition followed by a single start condition. If an
invalid subaddress is issued by the user, the ADV7604 does not issue an acknowledge and returns
to the idle condition.
If the user exceeds the highest subaddress in auto increment mode, the following actions are taken:
Rev. F August 2010

Table 93: Register Maps and I

Address Programmable
Address
0x40
0x84
0x80
0x7C
0x70
0x78
0x4C
0x64
0x6C
0x68
0x60
0x44
0x48
2
C Port
384
2
C Addresses
Location at which Address
can be Programmed
No Not applicable
Yes IO Map, Register 0xF3
Yes IO Map, Register 0xF4
Yes IO Map, Register 0xF5
Yes IO Map, Register 0xF6
Yes IO Map, Register 0xF7
Yes IO Map, Register 0xF8
Yes IO Map, Register 0xF9
Yes IO Map, Register 0xFA
Yes IO Map, Register 0xFB
Yes IO Map, Register 0xFC
Yes IO Map, Register 0xFD
Yes IO Map, Register 0xFE
ADV7604