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Functional Description
Figure 5-1
shows how the DAI pin buffers are connected via the SRU.
The DAI is comprised of four primary blocks:
• Peripherals (A/B/C) associated with the DAI
• A Signal Routing Unit (SRU)
• DAI I/O pin buffers
• Miscellaneous buffers
The peripherals shown in
master or slave capable); one acts as signal input, one as signal output and
the third as an output enable. The SRUs are based on a group of multi-
plexers which are controlled by registers to establish the desired
interconnects.
The miscellaneous buffers have an input and output and are used for
group interconnection.
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
Digital Application Interface
Figure 5-1
can have up to three connections (if
5-3
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