Programming Example
SRU(DAI_PB11_O, IDP0_DAT_I);
SRU(DAI_PB12_O, IDP0_FS_I);
/* Pin buffers 10, 11 and 12 are always being used as */
/* inputs. Tie their enables to LOW (never driven). */
/* Connect PBEN10_I to LOW */
/* Connect PBEN11_I to LOW */
/* Connect PBEN12_I to LOW */
SRU(LOW, PBEN10_I);
SRU(LOW, PBEN11_I);
SRU(LOW, PBEN12_I);
/* Assign a value to N_SET. An interrupt will be raised */
/* when there are N_SET+1 words in the FIFO. */
r0 = dm(IDP_CTL);
r0 = BCLR r0 BY 0;
r0 = BSET r0 BY 1;
r0 = BSET r0 BY 2;
r0 = BCLR r0 BY 3;
dm(IDP_CTL) = r0;
ustat1 = dm(DAI_IRPTL_RE);
bit set ustat1 IDP_FIFO_GTN_INT;
dm(DAI_IRPTL_RE) = ustat1;
ustat1 = dm(DAI_IRPTL_FE);
bit set ustat1 IDP_FIFO_GTN_INT;
dm(DAI_IRPTL_FE) = ustat1;
ustat1 = dm(DAI_IRPTL_PRI);
bit set ustat1 IDP_FIFO_GTN_INT;
dm(DAI_IRPTL_PRI) = ustat1;
ustat1 = dm(IDP_CTL);
bit set ustat1 IDP_EN;
dm(IDP_CTL) = ustat1;
8-32
www.BDTIC.com/ADI
/* N_SET = 6 */
/* Unmask for rising edge */
/* Map to high priority in core */
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
/* Mask for falling edge */
/* Start the IDP */
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