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1 INTRODUCTION
The ADSP-2136x SHARC processors are high performance 32-bit proces-
sors used for high quality audio, medical imaging, communications,
military, test equipment, 3D graphics, speech recognition, motor control,
imaging, and other applications. By adding on-chip SRAM, integrated
I/O peripherals, and an additional processing element for single-instruc-
tion, multiple-data (SIMD) support, this processor builds on the
ADSP-21000 family DSP core to form a complete system-on-a-chip.
ADSP-2136x SHARC Design Advantages
A digital signal processor's data format determines its ability to handle sig-
nals of differing precision, dynamic range, and signal-to-noise ratios.
Because floating-point DSP math reduces the need for scaling and the
probability of overflow, using a floating-point processor can simplify algo-
rithm and software development. The extent to which this is true depends
on the floating-point processor's architecture. Consistency with IEEE
workstation simulations and the elimination of scaling are clearly two
ease-of-use advantages. High level language programmability, large
address spaces, and wide dynamic range allow system development time to
be spent on algorithms and signal processing concerns, rather than assem-
bly language coding, code paging, and error handling. The ADSP-2136x
processor is a highly integrated, 32-bit floating-point processor which pro-
vides all of these design advantages.
The SHARC processor architecture balances a high performance processor
core with high performance program memory (PM), data memory (DM)
and input/output (I/O) buses. In the co re, every instruction can execute in
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
1-1
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