Analog Devices SHARC ADSP-2136 Series Hardware Reference Manual page 240

Register Descriptions
SPI Transfer Protocol for CPHASE = 0
CLOCK CYCLE
NUMBER
SPICLK
CLKPL=0
(SPI MODE 0)
SPICLK
CLKPL=1
(SPI MODE 2)
MOSI
MSB
FROM MASTER
*
MISO
FROM SLAVE
MSB
SPIDS
FROM MASTER
SPI Transfer Protocol for CPHASE = 1
CLOCK CYCLE
NUMBER
SPICLK
CLKPL=0
(SPI MODE 1)
SPICLK
CLKPL=1
(SPI MODE 3)
MOSI
MSB
*
FROM MASTER
MISO
MSB
*
FROM SLAVE
SPIDS
TO SLAVE
Figure 7-5. SPI Transfer Protocol for CPHASE = 0
7-16
www.BDTIC.com/ADI
1 2 3
6 5
6 5
1 2 3 4
6 5 4
6 5 4
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
4 5 6
4 3 2
4 3 2
5 6 7
3 2 1
3 2 1
* = UNDEFINED
7 8
1 LSB *
1 LSB *
* = UNDEFINED
8
LSB *
LSB