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PWM Global Status Register (PWMGSTAT) .................... A-24
PWM Control Register (PWMCTLx) ............................... A-25
PWM Status Registers (PWMSTATx) ............................... A-26
PWM Period Registers (PWMPERIODx) ......................... A-27
PWM Output Disable Registers (PWMSEGx) .................. A-27
PWM Polarity Select Registers (PWMPOLx) .................... A-28
PWM Channel Duty Control Registers
(PWMAx, PWMBx) ...................................................... A-29
PWM Channel Low Duty Control Registers
(PWMALx, PWMBLx) ................................................. A-29
PWM Dead Time Registers (PWMDTx) .......................... A-29
PWM Debug Status Registers (PWMDBGx) .................... A-30
Peripherals Routed Through the DAI ......................................... A-30
Serial Port Registers .............................................................. A-30
SPORT Serial Control Registers (SPCTLx) ....................... A-30
SPORT Multichannel Control Registers (SPMCTLxy) ...... A-43
SPORT Transmit Select Registers (MTxCSy) .................... A-45
SPORT Transmit Compand Registers (MTxCCSy) ........... A-45
SPORT Receive Select Registers (MRxCSx) ...................... A-46
SPORT Receive Compand Registers (MRxCCSx) ............. A-46
SPORT Divisor Registers (DIVx) ..................................... A-46
Input Data Port Registers ..................................................... A-47
Input Data Port DMA Control Registers .......................... A-47
Input Data Port Control Register 0 (IDP_CTL0) ............. A-47
Input Data Port Control Register 1 (IDP_CTL1) ............. A-49
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
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