Table of Contents
Advertisement
When the period expires,
asserted. An external clock can trigger the Timer to issue an inter-
rupt and wake up an idle processor.
Reads of the count register are not supported in EXT_CLK mode.
Programming Examples
This section provides two programming examples written for the
ADSP-2136x processor processors.
The first listing,
using DAI pin 1 as its input. The timer generates an interrupt when it
senses the number of edges are equal to the timer period setting. The sec-
ond listing,
Listing
in PWMOUT mode, using DAI pin 1 as its output. Timer 1 is set up in
width capture mode, using Timer 0 as its input. The period and pulse
width measured by timer 1 are identical to the settings of timer 0.
Listing 9-1. External Watchdog Mode Example
#include <def21364.h>
#include <sru21364.h>
#include <SRU.h>
/* Route Timer0 Input to DAI Pin 1 via SRU */
SRU(DAI_PB01_O, TIMER0_I);
ustat3 = TIMODEEXT|
IRQEN|
PRDCNT;
dm(TM0CTL) = ustat3;
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
IRQ
Listing
9-1, sets up timer 0 in external watchdog mode,
9-2, uses both timer 0 and timer 1. Timer 0 is set up
/* External Watchdog Mode */
/* Positive edge always active */
/* Enable Timer 0 interrupt */
/* Count to end of period */
Peripheral Timers
(if enabled) is set and
is
TMR_IRQ
9-25
Advertisement
Table of Contents
