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Operation Modes
The largest value that can be written to the 16-bit
0xFFFF = 65,535 which corresponds to a minimum PWM switching fre-
quency of:
PWMPERIOD
when the PWM outputs or PWM sync is enabled.
Dead Time
The second important parameter that must be set up in the initial config-
uration of the PWM block is the switchi n g dead time. This is a short delay
time introduced between turning off one PWM signal (say
ing on the complementary signal,
to permit the power switch being turned off (
recover its blocking capability before the complementary switch is turned
on. This time delay prevents a potentially destructive short-circuit condi-
tion from developing across the DC link capacitor of a typical voltage
source inverter.
The 10-bit, read/write
time, T
, is related to the value in the
d
Therefore, a PWMDT value of 0x00A (= 10), introduces a 200 ns delay
between when the PWM signal (for example
plementary signal (
therefore be programmed in increments of 2
MHz peripheral clock). The
maximum value they can contain is 0x3FF (= 1023) which corresponds to
10-12
www.BDTIC.com/ADI
100 10
----------------------- -
=
f PWM
(
) min
,
2 65535
values of 0 and 1 are not de fined and should not be used
AL
registers control the dead time. The dead
PWMDT3–0
=
T d
PWMDT 2
) is turned on. The amount of the dead time can
AL
PWMDTx
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
PWMPERIODx
6
×
=
763Hz
×
. This short time delay is introduced
in this case) to completely
AH
registers by:
PWMDTx
×
×
t PCLK
) is turned off and its com-
AH
(or 20 ns for a 100
× PCLK
registers are 10-bit registers, and the
register is
) and turn-
AH
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