Analog Devices SHARC ADSP-2136 Series Hardware Reference Manual page 634

Index
DMA
switching from transmit to receive mode,
7-41
TCB memory allocation,
TCBs and, 2-20 to 2-31
transfers, 8-20
transmit or receive operations
Dolby, DTS audio standards (S/PDIF),
11-10
double update mode (PWM),
DSP, architectural overview,
DSxEN (SPI device select) bits, 7-36,
DTS format, 11-18
DTYPE (data type) bits, A-32,
duty cycles and dead time in PWM,
DXS_B, DSX_A (data buffer channel A/B
status) bit, A-35, A-38, A-39,
E
early vs. late frame syncs,
ECPP (parallel port DMA external word
count) register, 4-12,
edge-related interrupts,
EIPPx (parallel port DMA external address
registers), 14-38
EIPPx (parallel port DMA external index)
registers, 4-10, 4-14
EMPP (parallel port DMA external address
modifier) register, 14-38
EMPPx (parallel port DMA external
modify) registers, 4-14
enable
buffer, SPORTs, 6-10
buffers, SRU output,
channels, SPORTs, 6-19
companding, SPORTs,
DMA interrupt (INTEN) bit,
duplex, SPI, 7-3
error, multi master detect (SPI),
EXT_CLK mode, 9-17
I-6
www.BDTIC.com/ADI
(continued)
2-20
(SPI),7-37
10-20
1-6
A-22
A-40
10-13
A-42
6-31
14-38
5-28
7-17
6-24
7-29
7-19
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
enable
external cock synchronization, PCG,
13-9
frame sync, PCG, 13-7
full duplex, SPORTs,
2
S mode, SPORTs, 6-39
I
interrupts, memory-to-memory,
left-justified mode, SPORTs,
multichannel, SPORTs,
packing, SPI, 7-18
PCGs, 13-5, 13-10
peripheral timer, 9-7
pin buffer, timer, 9-4
PLL, S/PDIF, 11-15
pulse width modulation groups,
PWM_OUT mode, 9-9
PWM output signals, 10-4,
serial mode, SPORTs,
slave, SPI, 7-3
SPDIF transmit buffer,
SPI, 7-17
SPI DMA, 7-37
SPIDS (ISSEN) bit, 7-19
SPI Rx, Tx, 7-9
SPI slave, 7-9, 7-24
standalone mode, S/PDIF,
synchronize (counter) bits, PWM,
WDTH_CAP mode,
endian format, 6-21, 7-2,
equation
address latch (ALE), 4-23
address latch cycles, 4-22
dead time, 10-13
duty cycles in PWM,
frame sync frequency,
frame sync pulse (SPORT),
parallel port access (8, 16-bit),
peripheral timer period,
pulse width modulation switching
frequency, 10-11
(continued)
6-4
3-3
6-37
6-12
10-10
10-5
6-34
11-10
11-9
10-7
9-14
A-32
10-15
6-26
6-26
4-21
9-13