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Serial Data Routing Registers (SRU_DATx, Group B)
The serial data routing control registers (see
Figure
A-50) route serial data to the serial ports (A and B data channels)
and the input data port. Each of the data inputs specified are connected to
a data source based on the 6-bit values shown in
31 30 29 28 27 26 25 24
SPORT2_DA_I (29–24)
Serial Port 2 Data Channel A Input
SPORT1_DB_I (23–18)
Serial Port 1 Data Channel B Input
15 14 13 12
SPORT1_DA_I (17–12)
SPORT0_DB_I (11–6)
Serial Port 0 Data Channel B Input
Figure A-45. SRU_DAT0 Register
31 30 29 28 27 26 25 24
SPORT4_DB_I (29–24)
Serial Port 4 Data Channel B Input
SPORT4_DA_I (23–18)
Serial Port 4 Data Channel A Input
15 14 13 12
SPORT3_DB_I (17–12)
SPORT3_DA_I (11–6)
Serial Port 3 Data Channel A Input
Figure A-46. SRU_DAT1 Register
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
23 22 21 20 19 18 17 16
11 10
9
8
7
6
5
4
23 22 21 20 19 18 17 16
11 10
9
8
7
6
5
4
Registers Reference
Figure A-46
through
Table
A-43.
SPORT1_DA_I (17–12) (con't)
Serial Port 1 Data
Channel A Input
3
2
1
0
SPORT0_DA_I (5–0)
Serial Port 0 Data
Channel A Input
SPORT3_DB_I (17–12) (con't)
Serial Port 3 Data
Channel B Input
3
2
1
0
SPORT2_DB_I (0–5)
Serial Port 2 Data
Channel B Input
A-85
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