IOP Performance
Since the I/O processor controls the I/O bus, the maximum bandwidth is
achieved with
PCLK
Table 2-17. I/O Processor TCB Chain Loading Access
Chained TCB Type
SPI DMA, SPORT DMA
Parallel Port DMA
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
× 32-bit as shown in
I/O Processor
Table
2-17.
TCB Size
4
7
Number of Core
Cycles
26
40
2-35
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