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Pin Descriptions
Pin Descriptions
The PWM module has four groups of four PWM outputs each, for a total
of 16 PWM outputs. These outputs are described in
Table 10-2. PWM Pin Descriptions
Multiplexed Pin
Name
PWM_AH3–0
PWM_AL3–0
PWM_BH3–0
PWM_BL3–0
Functional Description
Each PWM group is able to generate complementary signals on two out-
puts in paired mode or each group can provide independent outputs in
non-paired mode.
The switching frequency and dead time (see
of the generated PWM patterns are programmable using the
and
registers. In addition, two duty cycle control registers (
PWMDTx
and
) directly control the duty cycles of the two pairs of PWM sig-
PWMBx
nals. In non-paired mode, the low side signals can have different duty
cycles programmed through another pair of registers (
It should be further noted that the choice of center- or edge-aligned mode
applies to a single group of four PWM waveforms. Each of the four PWM
output signals can be enabled or disabled by separate output enable bits in
the
register (see
PWMSEG0–3
SEGx)" on page
emergency dead time insertion circuit enforces a dead time defined by
10-4
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Direction
Description
O
PWM output of pair A produce high side drive signals.
O
Complementary PWM output of pair A produce low side
drive signals.
O
PWM output of pair B produce high side drive signals.
O
Complementary PWM output of pair B produce low side
drive signals.
"PWM Output Disable Registers (PWM-
A-27). Additionally, in center-aligned paired mode, an
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
Table
10-2.
"Dead Time" on page
PWMPERIODx
and
PWMALx
10-12)
PWMAx
).
PWMBLx
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