Buffer Hang Disable (BHD) .................................................. 6-55
Effect Latency ....................................................................... 6-55
Programming Model ................................................................... 6-56
Setting Up and Starting Chained DMA .................................. 6-56
Enter DMA Chain Insertion Mode ........................................ 6-57
Programming Examples ............................................................... 6-57
SERIAL PERIPHERAL INTERFACE PORTS
Features ........................................................................................ 7-1
Pin Descriptions ........................................................................... 7-3
SRU Programming ........................................................................ 7-4
Functional Description ................................................................. 7-5
Single Master Systems .............................................................. 7-7
Broadcast Access ...................................................................... 7-8
Multi Master Systems .............................................................. 7-8
Register Descriptions .................................................................. 7-10
Control Register (SPICTLx) .................................................. 7-10
Transfer Initiate Mode (TIMOD) ...................................... 7-11
Input Slave Select Enable (ISSEN) ..................................... 7-12
Disable MISO (DMISO) .................................................. 7-12
Word Lengths (WL) .......................................................... 7-13
Modes (CLKPL, CPHASE) ............................................... 7-14
Open Drain Mode (OPD) ................................................. 7-17
Enable (SPIEN) ................................................................ 7-17
Packing (PACKEN) .......................................................... 7-18
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
Contents
xiii
Need help?
Do you have a question about the SHARC ADSP-2136 Series and is the answer not in the manual?