Analog Devices SHARC ADSP-2136 Series Hardware Reference Manual page 601

Register Mnemonic Address
IDP_DMA_PC2 0x242A
IDP_DMA_PC3 0x242B
IDP_DMA_PC4 0x242C
IDP_DMA_PC5 0x242D
IDP_DMA_PC6 0x242E
IDP_DMA_PC7 0x242F
SRU Registers
SRU_CLK0 0x2430
SRU_CLK1 0x2431
SRU_CLK2 0x2432
SRU_CLK3 0x2433
SRU_CLK4 0x2434
SRU_DAT0 0x2440
SRU_DAT1 0x2441
SRU_DAT2 0x2442
SRU_DAT3 0x2443
SRU_DAT4 0x2444
SRU_DAT5 0x2445
SRU_FS0 0x2450
SRU_FS1 0x2451
SRU_FS2 0x2452
SRU_FS3 0x2453
SRU_PIN0 0x2460
SRU_PIN1 0x2461
SRU_PIN2 0x2462
SRU_PIN3 0x2463
SRU_PIN4 0x2464
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
Description
IDP DMA Channel 2 Ping Pong Count
IDP DMA Channel 3 Ping Pong Count
IDP DMA Channel 4 Ping Pong Count
IDP DMA Channel 5 Ping Pong Count
IDP DMA Channel 6 Ping Pong Count
IDP DMA Channel 7 Ping Pong Count
SRU Clock Control 0
SRU Clock Control 1
SRU Clock Control 2
SRU Clock Control 3
SRU Clock Control 4
SRU Data Control 0
SRU Data Control 1
SRU Data Control 2
SRU Data Control 3
SRU Data Control 4
SRU Data Control 5
SRU FS Control 0
SRU FS Control 1
SRU FS Control 2
SRU FS Control 3
SRU Pin Control 0
SRU Pin Control 1
SRU Pin Control 2
SRU Pin Control 3
SRU Pin Control 4
Registers Reference
A-117
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x2526 30C2
0x3DEF 7BDE
0x3DEF 7BDE
0x3DEF 7BDE
0x3DEF 7BDE
0x0814 4040
0x0F38 B289
0x0000 0450
0x0
0x0
0x0
0x2736 B4E3
0x3DEF 7BDE
0x3DEF 7BDE
0x3DEF 7BDE
0x04C8 0A94
0x04E8 4B96
0x0366 8C98
0x03A7 14A3
0x0569 4F9E