Analog Devices SHARC ADSP-2136 Series Hardware Reference Manual page 242

Register Descriptions
Packing (PACKEN)
In order to communicate with 8-bit SPI devices and store 8-bit words in
internal memory, a packed transfer feature is built into the SPI port. Pack-
ing is enabled through the
transmits and packs data when it receives. When packing is enabled, two
8-bit words are packed into one 32-bit word. When the SPI port is trans-
mitting, two 8-bit words are unpacked from one 32-bit word. When
receiving, words are packed into one 32-bit word from two 8-bit words.
An example of unpacking data before transmitting follows.
The value 0xXXLMXXJK (where XX is any random value and JK and LM
are data words to be transmitted out of the SPI port) is written to the
register. The processor transmits 0xJK first and then transmits
TXSPI
0xLM.
An example of packing on the received data:
The receiver packs the two words received, 0xJK and then 0xLM, into a
32-bit word. They appear in the
• 0x00LM00JK => if
0xFFLMFFJK
Status Register (SPISTATx)
This bits in this register (
transmission errors for the port and are described in the following sec-
tions. Corresponding bits (
registers are set when an error occurs during a DMA transfer. These sticky
bits generate an SPI interrupt when any one of them are set.

Always clear the W1C-type bits before re-enabling the SPI, as these
bits are not cleared even if SPI is disabled. This can be done by
writing 0xFF to the
enable the SPI ports after
7-18
www.BDTIC.com/ADI
bit (15). The SPI unpacks data when it
PACKEN
RXSPI
is configured to 0 or
SGN
=> if is configured to 1 and
SGN
, and
MME TUNF
,
SPIMME SPIUNF
registers. In the case of an
SPISTATx
SPIDS
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
register as:
L, J < 7
L, J > 7
) provide information on
ROVF
and ) in the
SPIOVF
is deasserted.
SPIDMACx
error,
MME