Analog Devices SHARC ADSP-2136 Series Hardware Reference Manual page 12

Contents
Selecting Transmit and Receive Channel Order
(L_FIRST) .................................................................... 6-39
Multichannel Operation ........................................................ 6-40
Frame Syncs Signals .......................................................... 6-42
Transmit Valid Signals ...................................................... 6-43
Multichannel Mode Control Bits ...................................... 6-44
Number of Channels (NCH) ............................................ 6-45
Frame Delay (MFD) ......................................................... 6-45
Channel Selection Registers ................................................... 6-45
Companding Selection ...................................................... 6-46
Transmit Selection Registers .............................................. 6-46
Receive Selection Registers ................................................ 6-47
Data Transfer Types .................................................................... 6-47
Core Transfers ....................................................................... 6-47
Single Word Transfers ....................................................... 6-47
Internal Memory DMA Transfers .......................................... 6-48
Standard DMA ..................................................................... 6-50
DMA Chaining ..................................................................... 6-51
DMA Chain Insertion Mode ................................................. 6-52
Interrupts ................................................................................... 6-52
Internal Transfer Completion ................................................ 6-52
Shared Channels ................................................................... 6-53
Debug Features ........................................................................... 6-54
SPORT Loopback ................................................................. 6-54
Loopback Routing ............................................................ 6-55
xii
www.BDTIC.com/ADI
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors