Analog Devices SHARC ADSP-2136 Series Hardware Reference Manual page 68

DMA Channel Priority
Table 2-9. DMA Channel Priorities (Cont'd)
DMA Peripheral
Channel Group
Number
8 C
9
10
11
12 D
13
14
15
2-12
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Control/Status Parameter
Registers Registers
SPCTL4, IISP4A, IMSP4A,
SPMCTL45 CSP4A, CPSP4A
SPCTL4, IISP4B, IMSP4B,
SPMCTL45 CSP4B, CPSP4B
SPCTL5, IISP5A, IMSP5A,
SPMCTL45 CSP5A, CPSP5A
SPCTL5, IISP5B, IMSP5B,
SPMCTL45 CSP5B, CPSP5B
IDP_CTL0, IDP_DMA_I0,
IDP_CTL1, IDP_DMA_M0,
IDP_FIFO, IDP_DMA_C0,
IDP_PP_CTL, IDP_DMA_I0A,
DAI_STAT IDP_DMA_I0B,
IDP_DMA_PC0
IDP_CTL0, IDP_DMA_I1,
IDP_CTL1, IDP_DMA_M1,
IDP_FIFO, IDP_DMA_C1,
DAI_STAT IDP_DMA_I1A,
IDP_DMA_I1B,
IDP_DMA_PC1
IDP_CTL0, IDP_DMA_I2,
IDP_CTL1, IDP_DMA_M2,
IDP_FIFO, IDP_DMA_C2,
DAI_STAT IDP_DMA_I2A,
IDP_DMA_I2B,
IDP_DMA_PC2
IDP_CTL0, IDP_DMA_I3,
IDP_CTL1, IDP_DMA_M3,
IDP_FIFO, IDP_DMA_C3,
DAI_STAT IDP_DMA_I3A,
IDP_DMA_I3B,
IDP_DMA_PC3
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
Data Buffer Description
RXSP4A or Serial Port 4A
TXSP4A Data
RXSP4B or Serial Port 4B
TXSP4B Data
RXSP5A or Serial Port 5A
TXSP5A Data
RXSP5B or Serial Port 5B
TXSP5B Data
IDP_FIFO DAI IDP or
PDAP
(only channel
0 supports
both
IDP_FIFO DAI IDP
Channel 1
IDP_FIFO DAI IDP
Channel 2
IDP_FIFO DAI IDP
Channel 3