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Notes on Reading Register Drawings
The register drawings in this appendix provide "at-a-glance" information
about specific registers. They are designed to give experienced users basic
information about a register and its bit settings. When using these regis-
ters, the following should be noted.
1. The figures provide the bit mnemonic and its definition. Where
necessary, detailed descriptions can be found in the tables that fol-
low the register drawings and in the chapters that describe the
particular module.
2. The VisualDSP++ tools suite contains the complete listing of regis-
ters in a header file,
3.
"Register Listing" on page A-108
accessible registers, their addresses, and their state at reset.
4. In most cases, control registers are read/write (RW) and status reg-
isters are read only (RO). Some registers provide error status bits
which are write-one-to-clear (W1C). Where individual bits within
a register differ, they are noted in the register drawing.
ADSP-2136x SHARC Processor Hardware Reference
www.BDTIC.com/ADI
for the ADSP-21362/3/4/5/6 Processors
.
def2136x.h
provides a complete list of user
Registers Reference
A-3
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