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DAI Signal Routing Unit Registers
DAI Status Registers
The
register, shown in
DAI_STAT
Table
A-41, and the
page
A-107, provide status information for the IDP/PDAP DMA
channels.
DAI Pin Buffer Registers (DAI_PIN_PULLUP, DAI_PIN_STAT)
The
DAI_PIN_STAT
buffer level status information. Reading 0 indicates low level of V
reading a 1 indicates a high level of V
DAI_PIN_PULLUP
enable/disable pull-up resistors. (Bits 19–0 of this register control the
pull-up resistors on DAI_P20–1.) Setting a bit to 1 enables a pull-up resis-
tor on the corresponding pin. After reset, the pull-up resistors are enabled
on all 20 DAI pins.
31 30 29 28 27 26 25 24
DAI_P20_PULLUP
DAI_P19_PULLUP
15 14 13 12
DAI_P16_PULLUP
DAI_P15_PULLUP
DAI_P14_PULLUP
DAI_P13_PULLUP
DAI_P12_PULLUP
DAI_P11_PULLUP
DAI_P10_PULLUP
DAI_P09_PULLUP
Figure A-66. DAI_PIN_PULLUP Register
A-106
www.BDTIC.com/ADI
Figure A-39
DAI_PIN_STAT
register, shown in
register, shown in
Figure
23 22 21 20 19 18 17 16
11 10
9
8
7
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors
and described in
register, shown in
Figure A-67 on
Figure
A-67, provides DAI pin
. information. The
DDEXT
A-66, allows programs to
6
5
4
3
2
1
0
,
DDEXT
DAI_P17_PULLUP
DAI_P18_PULLUP
DAI_P01_PULLUP
DAI_P02_PULLUP
DAI_P03_PULLUP
DAI_P04_PULLUP
DAI_P05_PULLUP
DAI_P06_PULLUP
DAI_P07_PULLUP
DAI_P08_PULLUP
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