Block Diagram Of 16-Bit Reload Timer - Fujitsu F2MC-16LX Hardware Manual

16.1.2

Block Diagram of 16-bit Reload Timer

Block Diagram of 16-bit Reload Timer is shown.
Block Diagram of 16-bit Reload Timer
16-bit timer register (down-counter) UF
Count clock generation circuit
Machine
clock
frequency φ
Pin
TIN 0 to TIN 2
Figure 16.1-1 Block Diagram of 16-bit Reload Timer
Internal data bus
TMRLR0 to TMRLR2
16-bit reload register
TMR0 to TMR2
CLK
Gate
3
input
Prescalor
Clear
Input
control circuit
External clock
3
Function
selection
Timer control status register (TMCSR0 to TMCSR2)
Reload signal
Wait signal
Circuit to determine
which clock is valid
CLK
Output signal
generation circuit
Reserved
Output signal
Clock selector
generation circuit
OUTL
2
Selection
signal
CHAPTER 16 16-BIT RELOAD TIMER
Reload
control circuit
Pin
EN
TOT 0 to TOT 2
Operation
RELD
control circuit
OUTE
387