Block Diagram Of The 16-Bit Reload Timer - Fujitsu F2MC-16LX Hardware Manual

16.1.2 Block Diagram of the 16-Bit Reload Timer

This section shows a block diagram of the 16-bit reload timer.
I Block diagram of the 16-bit reload timer
TMRLR
TMR
16-bit timer register (down-counter) UF
Count clock generation circuit
Machine
clock
frequency φ
Pin (TIN0)
Function
selection
Figure 16.1-1 Block diagram of the 16-bit reload timer
Internal data bus
16-bit reload register
CLK
Gate
3
input Circuit to determine
Prescaler
which clock is valid
Clear
Input control
circuit
External clock
Selection
3
signal
Timer control status register (TMCSR)
CHAPTER 16 16-BIT RELOAD TIMER
Reload signal
Wait signal
CLK
Output signal
generation circuit
Reversed
Output signal
Clock selector
generation circuit
OUTL
2
Reload
control circuit
To A/D
converter
Pin (TOT0)
EN
Operation
RELD
control circuit
OUTE
313