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Status Byte summary register
The Status Byte summary register reports conditions from other status registers.
Query data waiting in the N432A output buffer is immediately reported through
the "Message Available" bit (bit 4). Clearing an event register clears the
corresponding bits in the Status Byte summary register. Reading all messages in
the output buffer, including any pending queries, clears the Message Available
bit.
Table 1-3
Bit
0
1
2
3
4
5
6
7
Keysight N432A Programming Guide
Bit definitions – Status Byte register
Weight/Decimal
Definition
value
1
Not used (always set to 0)
Device Status register summary bit
2
One or more bits are set in the Device Status register (bits must be
"enabled" in the enable register)
4
Error/Event queue
Questionable Status register summary bit
8
One or more bits are set in the Questionable Status register (bits must
be "enabled" in the enable register)
Message available
16
Data is available in the N432A output buffer
Standard Event register summary bit
32
One or more bits are set in the Standard Event register (bits must be
"enabled" in the enable register)
Request for service
64
The N432A is requesting for service (serial poll)
Operation Status register summary bit
128
One or more bits are set in the Operation Status register (bits must be
"enabled" in the enable register)
N432A Remote Operation
1
105
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