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Example sequence
The figure below illustrates the response of a single bit position in a typical status
group for various settings. The changing state of the condition in question is
shown at the bottom of the figure. A small binary table shows the state of the
chosen bit in each status register at selected times T1 to T5.
A
B
C
D
Figure 1-11
Consider Case C, where the positive transition filter is set to 1 and the negative
transition filter is set to 0. This configures the N432A to set the corresponding bit
in the event register whenever the condition bit changes from 0 to 1. The enable
register is set to 1 to enable the summary bit to be generated each time there is a
change in the event register.
At time T1, the condition bit is 0. Since there is no changes to the condition bit at
this time, no corresponding bit in the event register will be set and the summary
bit is 0.
At time T2, the condition bit changes from 0 to 1. Since the positive transition
filter is set to detect condition bit changes from 0 to 1, the corresponding bit in
the event register will be set to 1. The enable register is set to 1, which means that
the summary bit will also be set to 1 whenever any bit in the event register is set
to 1.
Keysight N432A Programming Guide
0
0
0
0 0
0
0 0
0 1
1
1 0
1
0 0 0
1
1
0
0 0 0
1
Condition
0
T1
*
Typical status register bit changes
0
0
0
1
1
0
0
1
1
1
1
1
1 0
1
1
0
1
T2
*
marks when the event register is read
*
N432A Remote Operation
0
0
0 0
0
0
0
0 1
1
0
0
0
0
0
0
0
1
0
T3
T4
1
0 0
0
0
0 0
0
0
0
0
0
0
T5
*
97
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