Table of Contents
Advertisement
CHAPTER 3 INTERRUPT
3.3.1
Interrupt Control Register (ICR00 to ICR15)
The interrupt control register (ICR00 to ICR15) corresponds to every peripheral
function that has interrupt functions for controlling processing during interrupt
request generation. This register has different functions between write and read
operations.
■
Interrupt control register (ICR00 to ICR15) function
The interrupt control register (ICR00 to ICR15) consists of bit having the following four functions:
•
Interrupt level setting bit (IL2 to IL0)
•
Extended intelligent I/O service (EI
•
Extended intelligent I/O service (EI
•
Extended intelligent I/O service (EI
■
Configuration of interrupt control register (ICR00 to ICR15)
Figure 3.3-1 shows the bit configuration of the interrupt control register (ICR00 to ICR15).
Figure 3.3-1 Bit configuration of interrupt control register (ICR00 to ICR15)
Interrupt control register (ICR)
Interrupt control register (ICR)
R/W
R
W
-
Notes:
• Only when extended intelligent I/O service (EI
Please set "1" to the ISE bit when EI
not started. When EI
• ICS1, ICS0 bits can be only write. S1, S0 bits can be only read.
50
bit7
bit6
Address
0000B0
H
ICS3 ICS2 ICS1
to
0000BF
H
W
W
bit7
bit6
Address
0000B0
H
to
0000BF
H
-
-
: Readable/Writable
: Read only
: Write only
: Undefined
2
OS is not started, the setting of the ICS3 to ICS0 bits are unnecessary.
2
OS) permission bit (ISE3)
2
OS) channel selection bits (ICS3 to ICS0)
2
OS) status bits (S1, S0)
bit5
bit4
bit3
bit2
ICS0
ISE
IL2
W
W
R/W
R/W
bit5
bit4
bit3
bit2
S1
S0
ISE
IL2
R
R
R/W
R/W
2
OS) is started, the ICS3 to ICS0 bits are valid.
2
OS is started. Please set "0" to the ISE bit when EI
bit1
bit0
Initial value
IL1
IL0
00000111
R/W
R/W
bit1
bit0
Initial value
IL1
IL0
XX000111
R/W
R/W
B
B
2
OS is
Advertisement
Table of Contents
