Fujitsu MB90480 Series Hardware Manual page 348

F2mc-16lx 16-bit microcontroller
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CHAPTER 15 8/16-BIT PPG TIMER
[bit12] PIE1: ppg Interrupt Enable (PPG interrupt enable)
This bit is used to prohibit/allow PPG interrupts.
PIE1
0
1
If PUF0 is set to "1" when this bit is"1", an interrupt request occurs. When this bit is "0", no
interrupt generates.
This bit is initialized to "0" at reset.
Reading and writing are allowed.
[bit11] PUF1: ppg Underflow Flag (PPG counter underflow)
This bit is used to indicate the result of PPG counter underflow detection.
PUF1
0
1
In 8-bit PPG6 channel mode (PPG0/PPG1,PPG2/PPG3,PPG4/PPG5) and 8-bit prescaler + 8-
bit PPG mode, this bit is set to "1" when an underflow occurs because the counter value of
channel 1, 3, 5 changes "00
PPG3, PPG4/PPG5), this bit is set to "1" when an underflow occurs because the counter value
of channel 1, 3, 5 or channel 0, 2, 4 changes "0000
"0". Writing "1" has no effect. Reading by read-modify-write type instructions will always read
"1".
This bit is initialized to "0" at reset.
Reading and writing are allowed.
[bit10, bit9] MD1, 0: ppg Count Mode (operation mode selection)
These bits are used to select the PPG timer operation mode.
MD1
0
0
1
1
This bit is initialized to "0" at reset.
Reading and writing are allowed.
326
Interrupts prohibited
Interrupts allowed
No PPG counter underflow detected
PPG counter underflow detected
" → "FF
H
MD0
0
8-bit PPG2 channel independent mode (✕ 3)
1
8-bit prescaler/8-bit PPG1ch
0
Reserved (setting prohibited)
1
16-bit PPG1 channel mode (✕ 3)
Operation state
Operation state
". In 16-bit PPG3 channel mode (PPG0/PPG1, PPG2/
H
" → "FFFF
H
Operation mode
". Writing "0" clears this bit to
H

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