Fujitsu MB90480 Series Hardware Manual page 149

❍ CPU intermittent operation selector
The CPU intermittent operation selector selects the number of pause clocks in the CPU
intermittent operation mode.
❍ Standby control circuit
The standby control circuit controls the CPU-clock control circuit and peripheral clock control
circuit for resetting and changing to the low-power consumption mode.
❍ CPU-clock control circuit
The CPU-clock control circuit controls clocks supplied to the CPU.
❍ Peripheral clock control circuit
The peripheral clock control circuit controls clocks supplied to peripheral functions.
❍ Pin high-impedance control circuit
The pin high-impedance control circuit changes the states of external pins to high impedance in
the timebase timer mode and stop mode. In the stop mode, the circuit isolates pull-up resistance
with pins for which the pull-up option is selected.
❍ Internal reset generator circuit
The internal reset generator circuit generates an internal reset signal.
❍ Low-power consumption mode control register (LPMCR)
The low-power consumption mode control register (LPMCR) performs functions, such as
resetting and changing to the standby mode and defining the CPU intermittent operation
function.
CHAPTER 6 LOW-POWER CONSUMPTION MODE
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