Operation Of Ei 2 Os - Fujitsu MB90480 Series Hardware Manual

F2mc-16lx 16-bit microcontroller
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3.7.3
Operation of EI
CPU transfers the data by EI
peripheral function (resource) and the interrupt control register has been set to the
2
start of EI
OS. When the EI
Flowchart of Operation of EI
Interrupt request generation
of Peripheral function
ISE=1
YES
ISD/ISCS Read
With
finish request
from peripheral
functions?
NO
DIR=1
NO
Data is set to IOA
(data transfer)
Memory is set to BAP
IF=0
NO
BF=0
NO
DCT decrement
DCT=00
B
NO
Set S1, S0 to "00
Clear Peripheral function
interrupt request
CPU Operation return
2
OS
2
OS, when the interrupt request is output from the
2
OS operation ends, hardware interrupt is done.
2
OS
Figure 3.7-7 Flowchart of Operation of EI
NO
Interrupt processing
YES
YES
YES
Renewal value
depends on BW.
YES
Renewal value
depends on BW.
(-1)
2
EI
OS End processing
YES
"
Set S1, S0 to "01
B
2
OS
2
ISD
: EI
2
ISCS
: EI
IF
: IOA update/fixed selection bit
BW
: Data transfer length specification bit
BF
: BAP update/fixed selection bit
DIR
:
Data transfer direction specification bit
2
SE
: EI
DCT
: Data counter
IOA
: I/O address pointer
BAP
: Buffer address pointer
2
ISE
: EI
2
S1, S0
: EI
YES
SE=1
NO
Data is set to BAP
(data transfer)
Memory is set to IOA
IOA Update
BAP Update
"
Set S1, S0 to "11
B
Clear ISE to "0"
Interruption processing
CHAPTER 3 INTERRUPT
OS descriptor
OS status register
OS termination control bit
OS enable bit (ICR)
OS status (ICR)
"
B
85

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