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❍ Stop bit
One or two stop bits can be selected for sending. The receiving unit, however, will only identify
the first stop bit.
❍ Error detection
•
Mode 0: Parity errors, overrun errors, and frame errors can be detected.
•
Mode 1: Overrun and frame errors can be detected. Parity errors cannot be detected.
❍ Parity
Parity can be used only in operation mode 0 (asynchronous and normal modes). Whether to
use parity can be set with the PEN bit, while use of even or odd parity can be selected with the
P bit of the serial control register (SDR). Parity cannot be used in operation mode 1
(asynchronous and multiprocessor modes) and operation mode 2 (CLK synchronous mode).
Figure 19.5-4 shows the data format for sending and receiving data when parity is used.
The items "ST" and "SP" in the diagram indicate the "start bit" and "stop bit" respectively.
SIN0
ST
ST
SOT0
ST
SOT0
Note:
Parity cannot be used in operation modes 1 and 2.
Figure 19.5-4 Transfer data format when using parity
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
Data
SP
A parity error has occurred
during reception with even parity
0
0
(SCR: P = 0)
SP
Sending of even parity
0
1
(SCR: P = 0)
SP
Sending of odd parity
(SCR: P = 1)
0
0
Parity
CHAPTER 19 UART
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