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CHAPTER 13 8/16-BIT UP/DOWN COUNTER/TIMER
Figure 13.2-2 Block diagram of 8/16-bit up/down counter/timer (channel 1)
CGE1
Edge/level
ZIN1
detected
CMS1 CMS0 CES1 CES0 M16E UDMS
AIN1
Up/down count
clock selection
BIN1
Prescaler
CLKS
■
Pin related to 8/16-bit up/down counter/timer
The pin related to the 8/16-bit up/down counter/timer has the AIN0/BIN0/ZIN0 and AIN1/BIN1/
ZIN1 pins. The AIN0/BIN0/ZIN0 pin functions as the general-purpose I/O port (AIN0/P30, BIN0/
P31, ZIN0/P32) and the input pin of the up/down counter/timer. The AIN1/BIN1/ZIN1 pin
functions as the general-purpose I/O port (AIN1/P33, BIN1/P34, ZIN1/P35) and the input pin of
the up/down counter/timer.
❍ Setting when using as AIN0/BIN0/ZIN0 and AIN1/BIN1/ZIN1 pins
When using as the AIN/BIN/ZIN input pin, the AIN0/P30, BIN/P31, ZIN0/P32 and AIN1P33,
BIN1/P31, ZIN1/P35 pins should be set to input port by the port direction register (DDR3 bit8, 9,
10, 11, 12, 13 → "0").
262
CGE0
CGSC
UDCC
Carry
UDF1 UDF0 CDCF CFIE
CSTR
Data bus
8 bits
RCR1 (reload/compare register 1)
Reload
CTUT
control
UCRE
RLDE
Counter clear
8 bits
UDCR1 (up/down count register 1)
CITE UDIE
Count clock
Interrupt
output
CMPF
UDFF OVFF
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