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CHAPTER 16 DTP/EXTERNAL INTERRUPTS
16.4 Operations of DTP/External Interrupt Unit
This section describes the operations of the DTP/external interrupt unit.
■
Operation of external interrupt unit
If, after an external interrupt request has been set, the interrupt request specified in the ELVR
register is input to the corresponding pin, this resource will generate an interrupt request signal
for the interrupt controller. Interrupts that are generated by the interrupt controller at the same
time will be distinguished by priority. The interrupt controller will generate an interrupt request to
2
the F
MC-16LX CPU if the interrupt from the corresponding resource has the highest priority.
2
The F
MC-16LX CPU compares the interrupt level mask register (ILM) in the processor status
(PS) with the interrupt request level. If the request level is found to be higher than the value
expressed by the ILM bits, the hardware interrupt handling microprogram starts immediately
after the currently executed instruction is completed.
Figure 16.4-1 shows the operational flow for external interrupts.
External interrupt/DTP unit
ELVR
EIRR
ENIR
Interrupt
source
The interrupt handling microprogram reads data from the interrupt vector area and generates an
interrupt acknowledge signal for the interrupt controller. After that, it transfers the jump
destination address of the macro instruction, which is obtained from the interrupt vector, to the
program counter, and execution continues with the user's interrupt handling program.
348
Figure 16.4-1 External interrupt operation
Interrupt controller
Other
request
ICR
yy
ICF
xx
2
F
MC-16LXCPU
IL
CMP
ILM
INTA
CMP
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