Sector Configuration Of 2M/3M Bit Flash Memory - Fujitsu MB90480 Series Hardware Manual

23.2 Sector Configuration of 2M/3M Bit Flash Memory

This section describes the sector configuration of the 2M/3M bit flash memory.
■
Sector configuration
Figure 23.2-1 shows the sector configuration of the 2M/3M bit flash memory. The addresses in
the figure indicate the upper and lower addresses of each sector.
To access from the CPU, SA0 is allocated in the FC bank register, SA1 is allocated in the FD
bank register, SA2 is allocated in the FE bank register, and SA3 to 6 are allocated in the FF
bank register.
Figure 23.2-1 Sector Configuration of 2M/3M Bit Flash Memory
2M bits flash memory
SA6 (16K bytes)
SA5 ( 8K bytes)
SA4 ( 8K bytes)
SA3 (32K bytes)
SA2 (64K bytes)
SA1 (64K bytes)
SA0 (64K bytes)
❍ Writer address
The writer address shown in Figure 23.2-1 is the address corresponding to the CPU address
when data is written to the flash memory with a parallel programmer. When using a general-
purpose programmer for write/erase operations, this address is used for write/erase operations.
Writer address CPU address
7FFFF FFFFFF
H H
7C000 FFC000
H H
7BFFF FFBFFF
H H
7A000 FFA000
H H
79FFF FF9FFF
H H
78000 FF8000
H H
77FFF FF7FFF
H H
70000 FF0000
H H
6FFFF FEFFFF
H H
60000 FE0000
H H
5FFFF FDFFFF
H H
50000 FD0000
H H
4FFFF FCFFFF
H H
40000 FC0000
H H
CHAPTER 23 2M/3M BIT FLASH MEMORY
3M bits flash memory
Writer address
7FFFF
H
SA8 (16K bytes)
7C000
H
7BFFF
H
SA7 ( 8K bytes)
7A000
H
79FFF
H
SA6 ( 8K bytes)
78000
H
77FFF
H
SA5 (32K bytes)
70000
H
6FFFF
H
SA4 (64K bytes)
60000
H
5FFFF
H
SA3 (64K bytes)
50000
H
4FFFF
H
Unused
40000
H
3FFFF
H
SA2 (64K bytes)
30000
H
2FFFF
H
SA1 (64K bytes)
20000
H
1FFFF
H
SA0 (64K bytes)
10000
H
0FFFF
H
Unused
00000
H
CPU address
FFFFFF
H
FFC000
H
FFBFFF
H
FFA000
H
FF9FFF
H
FF8000
H
FF7FFF
H
FF0000
H
FEFFFF
H
FE0000
H
FDFFFF
H
FD0000
H
FCFFFF
H
FC0000
H
FBFFFF
H
FB0000
H
FAFFFF
H
FA0000
H
F9FFFF
H
F90000
H
F8FFFF
H
F80000
H
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