Fujitsu MB90480 Series Hardware Manual page 167

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Pin states in external bus 8-bit data bus mode and multiplex 8-bit external bus mode
Table 6.7-3 lists pin states in the external bus 8-bit data bus mode and multiplex 8-bit external
bus mode.
Table 6.7-3 Pin states in external bus 8-bit data bus mode and multiplex 8-bit external bus mode
Pin name In sleep state
P07 to P00 Input disabled/
(AD07 to AD00) Output Hi-Z
P17 to P10
Output state *
(AD15 to AD08)
P27 to P20 Output state
1, 2
(A23 to A16) * *
Input disabled/
P57 (CLK) Output enabled
2, 3
* *
P56 (RDY)
P55 (HAK)
Maintains the
P54 (HRQ) previous state *
P53 (WRH)
P52 (WRL) "H" output *
P51 (RD) "H" output
P50 (ALE) "L" output
P37 to P30
P47 to P40
P67 to P60
Maintains the
P77 to P70
previous state *
P97 to P91
PA3 to PA0
P90 (CS0)
P87 to P80 Input enabled *
*1: "Output state" means that the pin-drive transistors are set in a drive-enabled state, but internal circuits are
stopped so that a fixed value, "H" or "L", is output. When internal peripheral circuits are in operation and
output functions are used, output varies except when reset. Output does not vary during a reset.
*2: The previous values are retained if used as an output port.
*3: "Output enabled" means that the pin-drive transistors are set in a drive state and that internal circuit
operations are enabled. Operational states are therefore conveyed on the pins.
*4: The state output immediately before this mode was set is output as it is. If it is input, input is disabled.
"Input disabled" means that operations of input gates located very close to the pins are enabled, but pin
states cannot be accepted in internal operations because internal circuits are not operating.
*5: In the state of "Input cutoff", input A is masked and "L" level is transmitted internally. "Output Hi-Z" means
that the pin-drive transistors are disabled and the pins are set to the high-impedance state.
*6: Same as in other ports when used in the output state. "Input enabled" means that input functions are ready
and require pull up/pull down or external input.
When stopped
SPL = 0 SPL = 1
Input cutoff/
Output Hi-Z
1 1
Output state *
Output state
1, 2
* *
Input disabled/
Output state
1, 2
* *
Input cutoff/
Maintains the
4
4
previous state *
Input cutoff/
Output Hi-Z *
4 4
"H" output *
"H" output
"L" output
Input cutoff/
Maintains the
4
4
previous state *
6 6
Input enabled * Input enabled *
CHAPTER 6 LOW-POWER CONSUMPTION MODE
In hold state When reset
Input disabled/
Output Hi-Z
Input disabled/
Output Hi-Z
Output state *
Input disabled/
2
Output Hi-Z *
Input disabled/ Input disabled/
Output enabled Output enabled
2, 3 3
* * *
2
Input disabled *
"L" output
Input disabled/
"H" input Output Hi-Z
Maintains the
4
previous state *
5
Input disabled/
2
Output Hi-Z *
"H" output
Input disabled/
Output Hi-Z
"L" output
Input disabled/
Output Hi-Z
Maintains the
4
previous state *
"H" output
6
Input disabled
Internal ROM
Internal ROM
access
access after
immediately
external ROM
after reset
access
cancellation
Output Hi-Z/ Output Hi-Z/
Input enabled Input enabled
Maintains the
1 1
Output state *
previous address
CLK output CLK output
Output Hi-Z/ Output Hi-Z/
Input enabled Input enabled
"H" output "H" output
"L" output "L" output
Output Hi-Z/ Output Hi-Z/
Input enabled Input enabled
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