Watch Timer Operation - Fujitsu MB90480 Series Hardware Manual

CHAPTER 11 WATCH TIMER

11.4 Watch Timer Operation

The watch timer functions as a clock source for the watchdog timer, timer for the
oscillation stabilization wait time of the sub-clock, and interval timer to generate
interrupts at fixed intervals.
■
Watch counter
The watch counter is composed of a 15-bit counter to count the sub-clock, and it always
continues counting as long as the sub-clock is input.
❍ Clearing the watch counter
The operation of clearing the watch counter is affected by a power-on reset, a transition to the
stop mode, and writing "0" to the watch counter clear bit (WTR) in the watch timer control
register (WTC).
Note:
Clearing the watch counter affects the watchdog timer and interval interrupts that use watch timer
output.
To clear the watch timer by writing "0" to the WTR bit in the watch timer control register (WTC), set
the WTIE bit to "0" and set the watch timer to interrupt inhibited state. Before permitting an
interrupt, clear the interrupt request issued by writing "0" to the WTOF flag.
■
Interval interrupt function of watch timer
This function generates interrupts at fixed intervals by using the carry signals of the watch
counter.
❍ Specification of the interval time
The interval time can be specified with the WTC2, WTC1, and WTC0 bits in the WTC register.
❍ Generation of watch timer interrupts
The watch timer interrupt request flag bit (WTOF) is set at each interval time specified by the WTC2
to WTC0 bits. Consequently, when interrupts are permitted by setting the watch timer interval
interrupt permit bit (WTIE) to "1", a watch timer interrupt occurs.
The timing, when the WTOF bit is set, depends on the timing as a time reference when the
watch timer was cleared for the last time.
Because the watch timer is used as the timer for the oscillation stabilization wait time of the sub-
clock after a transition to the stop mode, the WTOF bit is simultaneously cleared at the transition
to this mode.
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