Program Example Of 8/16-Bit Up/Down Counter/Timer - Fujitsu MB90480 Series Hardware Manual

13.6

Program Example of 8/16-bit Up/Down Counter/Timer

This section describes the program example of the 8/16-bit up/down counter/timer.
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Program example of 8/16-bit up/down counter/timer
Example of setting procedure
16-bit mode timer mode (down count) Count clock = 8
division
Reload count value and generate interval
interrupt. Interrupt source = underflow
<Initial setting>
•
Control up/down counter ch.0
Set control register
Set 16-bit mode enable>>
Reverse count direction>>
Enable count direction reversal interrupt>>
Select built-in prescaler>>
Select count mode>>
Select count clock edge>>
Select up/down mode>>
Write counter>>
Enable UDCR clear>>
Enable reload function>>
UDCR clear>>
Counter clear/gate selection>>
Counter clear/gate edge selection
•
Set reload value/compare value
Set reload value
•
Interrupt related
Set UD counter 0 interrupt level
Set I flag
<Start>
•
Start up/down counter ch.0
Control underflow interrupt
Transfer data from RCR to
UDCR
Start count operation
<Interrupt>
•
Interrupt processing
Check underflow detection flag
Clear interrupt request flag
(Arbitrary processing)
<Interrupt vector>
•
Set vector table
Note:
Setting related to clock and setting of _set_il (numeric
value) are required in advance. See the chapter of
clock and interrupt.
CHAPTER 13 8/16-BIT UP/DOWN COUNTER/TIMER
Program example
void UD0_sample_1(void)
{
UD0_initial();
UD0_start();
}
void UD0_initial(void)
{
IO_CCR0.word = 0x9018;/*Setting value=1001_0000_0001_1000 */
CCR0
.M16E
.CDCF
.CFIE
.CLKS
.CMS1-0
.CES1-0
.UDMS
.CTUT
.UCRE
.RLDE
.UDCC
.CGSC
*/
.CGE1-0
>>
RCR0 IO_RCR0 = 0xff;
RCR1 IO_RCR1 = 0xff;
ICR07 IO_ICR07.byte = 0x10;
__EI();
(CCR)
}
void UD0_start(void)
{
Register name. bit name
IO_CSR0.bit.UDIE = 1;
CSR0 .UDIE
IO_CCR0.bit.CTUT = 1;
CCR0 .CTUT
IO_CSR0.bit.CSTR = 1;
}
CSR0 .CSTR
__interrupt void UD0_int(void)
{
if(IO_CSR0.bit.UDFF)
{
IO_CSR0.bit.UDFF = 0;
CSR0 .UDFF
•••••
}
}
#pragma intvect UD0_int 25
Note:
For the description form of the register, see "SAMPLE I/O REGISTER FILES FOR
2
F MC-16LX FAMILY MB90480 SERIES".
/* bit15 = 1 M16E 16bit×1ch operation mode */
/* bit14 = 0 Clear CDCF count direction reversal flag */
/* bit13 = 0
Disable CFIE direction reversal interrupt
/* bit12 = 1 CLKS 8 machine cycles */
/* bit11-10 = 00 CMS1, 0 timer mode */
/* bit9-8 = 00 Disable CES1, 0 edge detection */
/* bit7 = 0 Select UMDS up/down mode */
/* bit6 = 0 Write CTUT counter (invalid) */
/* bit5 = 0 Disable UCRE counter clear */
/* bit4 = 1 Enable RLDE reload function */
/* bit3 = 1 Clear UDCC UDCR (invalid) */
/* bit2 = 0 CGSC ZIN counter clear function */
/* bit1-0 = 00 Disable CGE1, 0 ZIN edge detection
/* Set 16-bit mode reload value (arbitrary value) */
/* Set interrupt level (arbitrary value) */
/*Enable interrupt */
/* bit5 = 1 Enable UDIE underflow interrupt */
/* bit6 = 1 Write CTUT counter */
/* bit7 = 1 Activate CSTR count operation */
/* bit2 = 0 Clear UDFF underflow detection flag */
*/
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