Fujitsu MB90480 Series Hardware Manual page 346

F2mc-16lx 16-bit microcontroller
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CHAPTER 15 8/16-BIT PPG TIMER
[bit4] PIE0:ppg Interrupt Enable (PPG interrupt enable)
This bit is used to prohibit/allow PPG interrupts.
PIE0
0
1
If PUF0 is changed to "1" while this bit is "1", an interrupt request occurs. If this bit is "0", no
interrupt generates.
This bit is initialized to "0" at reset.
Reading and writing are allowed.
[bit3] PUF0: ppg Underflow Flag (PPG counter underflow)
This bit indicates the result of a PPG counter underflow detection.
PUF0
0
1
In 8-bit PPG6 channel mode (PPG0/PPG1,PPG2/PPG3,PPG4/PPG5) and 8-bit prescaler + 8-
bit PPG mode, this bit is set to "1" if an underflow occurs because the counter value for channel
0/2/4 changes "00
PPG5), this bit is set to "1" due to underflow if the counter value of channel 1, 3, 5 or channel 0,
2, 4 changes "0000
Reading by read-modify-write type instructions always read "1".
This bit is initialized to "0" at reset.
Reading and writing are allowed.
[bit0] reserved bit
This bit is reserved. When setting PPGC0/PPGC2/PPGC4, always set this bit to "1".
324
Interrupts prohibited
Interrupts allowed
No PPG counter underflow detected
PPG counter underflow detected
" → "FF
". In 16-bit PPG3 channel mode (PPG0/PPG1, PPG2/PPG3, PPG4/
H
H
" → "FFFF
". Writing "0" clears this bit to "0". Writing "1" has no effect.
H
H
Operation state
Operation state

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