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APPENDIX
MOV R0, A (This instruction transfers the eight low-order bits of A to the general-
Before execution
After execution
● Direct branch addressing (addr16)
Specify an offset explicitly for the branch destination address. The size of the offset is 16 bits, which
indicates the branch destination in the logical address space. Direct branch addressing is used for an
unconditional branch, subroutine call, or software interrupt instruction. Bit23 to bit16 of the address are
specified by the program bank register (PCB).
JMP 3B20
H
Before execution
After execution
● Physical direct branch addressing (addr24)
Specify an offset explicitly for the branch destination address. The size of the offset is 24 bits. Physical
direct branch addressing is used for unconditional branch, subroutine call, or software interrupt instruction.
JMPP 333B20
Before execution
After execution
596
Figure D.3-2 Example of Register Direct Addressing
purpose register R0.)
A 0 7 1 6
A 0 7 1 6
Figure D.3-3 Example of Direct Branch Addressing (addr16)
(This instruction causes an unconditional branch by direct branch
addressing in a bank.)
PC 3 C 2 0
PC 3 B 2 0
Figure D.3-4 Example of Direct Branch Addressing (addr24)
(This instruction causes an unconditional branch by direct branch 24-bit
H
addressing.)
PC 3 C 2 0
PCB 4 F
PC 3 B 2 0
PCB 3 3
2 5 3 4
R0
2 5 6 4
R0
PCB 4 F
4F3B20
H Next instruction
4F3C20
H
PCB 4 F
4F3C21
H
4F3C22
H
Memory space
333B20
Next instruction
H
4F3C20
H
4F3C21
H
4F3C22
H
4F3C23
H
Memory space
? ?
Memory space
3 4
Memory space
6 2
JMP 3B20
H
2 0
3 B
6 3
JMPP 333B20
H
2 0
3 B
3 3
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