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CHAPTER 6 LOW-POWER CONSUMPTION MODE
6.5
Standby Mode
The standby mode is divided into four modes, namely, the sleep (PLL sleep, main
sleep, and sub sleep), timebase timer, watch, and stop modes.
■
Operational states in standby mode
Table 6.5-1 lists operational states in the standby mode.
Table 6.5-1 Operational states in standby mode
Standby mode
PLL sleep
mode
Sleep mode
Main sleep
mode
Sub sleep
mode
Timebase
timer mode
(SPL = 0)
Timebase
timer mode
Timebase
timer mode
(SPL = 1)
Watch mode
(SPL = 0)
Watch mode
Watch mode
(SPL = 1)
Stop mode
(SPL = 0)
Stop mode
Stop mode
(SPL = 1)
*1:
The timebase timer and watch timer are operating.
*2:
The watch timer is operating
SPL: Pin-state specification bit of low-power consumption mode control register (LPMCR)
SLP: Sleep mode bit of low-power consumption mode control register (LPMCR)
STP: Stop mode bit of low-power consumption mode control register (LPMCR)
TMD:Watch/timebase timer mode bit of low-power consumption mode control register (LPMCR)
MCS:Machine clock selection bit of the clock selection register (CKSCR)
SCS: Machine clock selection bit (Sub) of the clock selection register (CKSCR)
Hi-Z: High impedance
RST: External-reset pin
132
Change
Main clock
Sub-clock
condition
SCS = 1
MCS = 0
SLP = 1
In operation
SCS = 1
MCS = 1
SLP = 1
SCS = 0
Stopped
SLP = 1
SCS = 1
In operation
TMD = 0
In operation
SCS = 1
TMD = 0
SCS = 0
TMD = 0
SCS = 0
TMD = 0
Stopped
STP = 1
Stopped
STP = 1
Machine
CPU
Peripheral
clock
In operation
In operation
Stopped *
Stopped
Stopped
Stopped *
Stopped
Cancellation
Pin
method
In operation
Hold
1
Reset or
interrupt
Hi-Z
Hold
2
Hi-Z
Hold
Hi-Z
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