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23.5 Verifying the Execution State of the Automatic Algorithm
The flash memory contains dedicated hardware indicating the internal operation state
of the flash memory and whether operations have been completed that can be used to
control the operational flow of write/erase operations via the automatic algorithm. The
operation state of built-in flash memory can verify using the hardware sequence flag.
■
Hardware sequence flags
The hardware sequence flags consist of the four bits DQ7, DQ6, DQ5, and DQ3. These bits
have the following functions: DQ7 is the data polling flag, DQ6 is the toggle bit flag, DQ5 is the
timing limit excess flag, and DQ3 is the sector erase timer flag. The hardware sequence flags is
therefore used to confirm that writing or chip sector erase has been completed or that erase
code write is valid.
Table 23.5-1 shows the bit assignments of the hardware sequence flags.
Table 23.5-1 Bit assignments of hardware sequence flags
Bit number
Hardware sequence flag
To refer to the hardware sequence flag, read the address of the sector for the internal flash
memory after the corresponding command sequence has been set (refer to Table 23.4-1).
The execution state of automatic algorithm can be checked in the following methods.
•
Check by referring to hardware sequence flag
•
Check by referring to RDY bit of flash memory control status register (FMCS)
When creating actual program, perform the subsequent instruction after completion of executing
automatic algorithm is checked using the above verification method. The hardware sequence
flags are described below.
CHAPTER 23 2M/3M BIT FLASH MEMORY
7
6
5
DQ7
DQ6
DQ5
4
3
2
-
DQ3
-
1
0
-
-
487
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