CHAPTER 8 I/O PORT
■
Analog input enable register (ADER)
The bit configuration of the analog input enable register (ADER) is shown in the figure below.
ADER
Address:00001F
R/W : Readable/Writable
The analog input enable register (ADER) controls the pins of port 6 as follows:
•
0: Sets the port I/O mode
•
1: Set the analog I/O mode. "1" is restored by a reset.
In the MB90480/485 series, each bit is set as follows:
•
ADE0: P60/AN0
•
ADE1: P61/AN1
•
ADE2: P62/AN2
•
ADE3: P63/AN3
•
ADE4: P64/AN4
•
ADE5: P65/AN5
•
ADE6: P66/AN6
•
ADE7: P67/AN7
■
Up/down timer input enable register (UDER)
The bit configuration of the up/down timer input enable register (UDER) is shown in the figure
below.
UDER
Address:00000B
R/W : Readable/Writable
The up/down timer input enable register (UDER) controls the pins of port 3 as follows:
•
0: Sets the port input mode
•
1: Sets the up/down timer input mode. "0" is restored by a reset.
In the MB90480/485 series, each bit is set as follows:
•
UDE0: P30/AIN0
•
UDE1: P31/BIN0
•
UDE2: P32/ZIN0
•
UDE3: P33/AIN1
•
UDE4: P34/BIN1
•
UDE5: P35/ZIN1
184
7
6
5
ADE7 ADE6 ADE5 ADE4 ADE3 ADE2 ADE1 ADE0
H
7
6
5
-
-
UDE5 UDE4 UDE3 UDE2 UDE1 UDE0 XX000000
H
4
3
2
1
4
3
2
1
0
Initial value Access
11111111
R/W
B
0
Initial value Access
R/W
B