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2
■
EI
OS Status Register (ISCS)
2
EI
OS status register (ISCS) is 8-bit register. The methods to renew the buffer address pointer
and I/O address pointer, the transfer data type (byte/word) and the transfer direction can be
specified.
Figure 3.7-5 Configuration of EI
7
6
bit
Reserved
Reserved
R/W
R/W
R/W
: Readable/Writable
: Undefined
X
: Buffer address pointer varies only in the lower 16 bits and can be incremented.
*1
: I/O register address pointer allows only incrementing.
*2
5
4
3
2
BW
BF
IF
Reserved
R/W
R/W
R/W
R/W
SE
0
Don't terminate by the termination request from a peripheral resource.
1
Terminate by the termination request from a peripheral resource.
DIR
I/O register address pointer → transfer to Buffer address pointer
0
Buffer address pointer → transfer to I/O register address pointer
1
BF
0
Update Buffer address pointer after completion transfer.
1
Don't update Buffer address pointer after completion transfer.
BW
0
Byte
1
Word
IF
0
Update I/O register address pointer after completion transfer.
Don't update I/O register address pointer after completion transfer.
1
Always set this bit to "0".
2
OS Status Register (ISCS)
Initial value
1
0
DIR
SE
XXXXXXXX
B
R/W
R/W
2
El
OS termination control bit
Data transfer direction specification bit
BAP update/fixed selection bit
Transfer data data length specification bit
I/OA update/fixed selection bit
Reserved bit
CHAPTER 3 INTERRUPT
*1
*2
83
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