Fujitsu MB90480 Series Hardware Manual page 391

Set the BUSY bit to "0" to forcibly stop operation.
When operation is stopped forcibly, data before the completion of conversion will be stored in
the conversion registers.
Note:
When operation is forcibly stopped in continuous mode, conversion data retains data before
operation of forced stop.
❍ Stop Mode
In this mode, analog input specified by the bits ANS and ANE is sequentially converted.
However, conversion operation stops temporarily after conversion of each channel. To release
the temporary stop, it is necessary to start A/D conversion again.
Analog input of channel set by ANS will be resumed and A/D conversion will continue when
conversion up to the end channel specified by the bit ANE ends.
One-channel conversion will be performed if the start and end channels are the same. (ANS = ANE)
Example:
ANS = 000
Start → AN0 → Stop → Activate → AN1 → Stop → Activate →
→ AN2 → Stop → Activate → AN3 → Stop → Activate → AN0 ...... Repeat
ANS = 010
Start → AN2 → Stop → Activate → AN2 → Stop → Activate → AN2 ...... Repeat
Only A/D startup sources specified by STS1 and 0 can be used in this mode.
Operation in this mode enables synchronizing the start of multiple conversions.
Conversion operation using μDMAC
■
Figure 17.5-1 shows an example of the operational flow (in continuous mode) from start of A/D
conversion to transfer of conversion data.
The result of the decision operation marked by "
settings of μDMAC.
Figure 17.5-1 Example of operation flow (in continuous mode) from start of A/D
A/D Conversion Start
Sample and hold
Conversion
Conversion end
Interrupt triggered
, ANE = 011
B B
, ANE = 010
B B
conversion to transfer of conversion data
CHAPTER 17 8/10-BIT A/D CONVERTER
" in the diagram is decided based on the
μDMAC start
Data transfer
Interrupt clear
Interrupt processing
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