Fujitsu MB90480 Series Hardware Manual page 147

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Clock modes
❍ Main clock mode
This mode operates the CPU and peripheral functions by using the clock of the oscillation clock
(HCLK) divided by two. The PLL multiplier circuit stops its operation in the main clock mode.
❍ Sub-clock mode
This mode operates the CPU and peripheral functions by using the sub-clock (SCLK). The main
clock and the PLL multiplier circuit stop their operation in the sub-clock mode.
Reference:
The clock mode includes the PLL clock mode except the low power consumption mode.
Refer to Section "5.4 Clock Modes", for more information on clock modes.
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CPU intermittent operation mode
The CPU intermittent operation mode operates the CPU intermittently while supplying a high-
speed clock to the peripheral functions, thereby reducing power consumption. This mode inputs
an intermittent clock only to the CPU while the CPU accesses registers, built-in memory,
peripheral functions, and external devices.
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Standby mode
The standby mode reduces current consumption by stopping supply of a clock to the CPU by
using the low-power consumption control circuit (sleep mode), stopping supply of a clock to the
CPU and peripheral functions (timebase timer mode), and stopping oscillation clocks (stop
mode).
❍ Sleep mode
The sleep mode stops the CPU operation clock in each clock mode. The CPU stops, and the
peripheral functions operates with the clock before the sleep mode shifts.
The clock mode when shifting to sleep mode divides into the main sleep mode, PLL sleep
mode, and the subsleep mode.
❍ Timebase timer mode
The timebase timer mode stops clocks and operations other than the oscillation clock, timebase
timer, and watch timer. Functions other than the timebase timer and watch timer are stopped.
❍ Watch mode
The watch mode operates only the watch timer. In this mode, only the sub-clock operates. The
main clock and PLL multiplier circuit are stopped.
❍ Stop mode
The stop mode stops source oscillation, and all functions are stopped. In the stop mode, the
oscillation clock stops and data can be retained with the lowest consumption of power.
CHAPTER 6 LOW-POWER CONSUMPTION MODE
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