Table 27.3-1 Serial clock frequency settings
m
5
6
7
8
Note:
The "+ 4" cycle in the formula reflects the minimum overhead for checking whether the output level
of the SCL pin has changed. If the rising edge of the SCL pin is delayed or a slave device delays
the clock, the overhead increases. Do not set the serial clock frequency to 100 kHz or more.
CHAPTER 27 I
CS4
CS3
0
0
0
1
1
0
1
1
2
C INTERFACE (ONLY MB90485 SERIES)
n
CS2
4
0
8
0
16
0
32
0
64
1
128
1
256
1
512
1
CS1
CS0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
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