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15.3.1 PPG0/2/4 Operation Mode Control Register
(PPGC0/PPGC2/PPGC4)
This section describes the configuration and functions of the PPG0/PPG2/PPG4
operation mode control register (PPGC0/PPGC2/PPGC4).
■
PPG0/2/4 operation mode control register (PPGC0/PPGC2/PPGC4)
The PPG0/PPG2PPG/4 operation mode control register (PPGC0/PPGC2/PPGC4) is used to
select the channel 0/2/4 operation mode, control the pin output, select the count clock, and
control the trigger.
The bit configuration of the PPG0/PPG2/PPG4 operation mode control register (PPGC0/
PPGC2/PPGC4) is shown below.
7
00003A
H
00003C
PEN0
H
00003E
H
(R/W)
(0)
The functions of the bits in the PPG0/PPG2/PPG4 operation mode control register (PPGC0/
PPGC2/PPGC4) are described below.
[bit7] PEN0: ppg Enable (operation enable)
This bit is used to select the PPG operation mode.
PEN0
0
1
•
When this bit is set to "1", the PPG starts counting.
•
This bit is initialized to "0" at reset.
•
Reading and writing are allowed.
[bit5] PE00: ppg Output Enable 00 (PPG0/PPG2/PPG4 output pin enable)
This bit is used to prohibit/allow pulse output via the pulse output external pin PPG0/PPG2/
PPG4.
PE00
0
1
•
This bit is initialized to "0" at reset.
•
Reading and writing are allowed.
6
5
4
3
-
PE00 PIE0 PUF0
(-)
(R/W) (R/W) (R/W)
(X)
(0)
(0)
(0)
Operation stop ("L" level output is retained)
PPG operation enable
General-purpose port pin (pulse output prohibited)
PPG0/PPG2/PPG4 pulse output (pulse output allowed)
CHAPTER 15 8/16-BIT PPG TIMER
2
1
0
PPGC0/PPGC2/PPGC4
-
-
Reserved Operation mode control register
(-)
(-)
(-)
Read/write
(X)
(X)
(1)
Initial value
Operation state
Operation state
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