Fujitsu MB90480 Series Hardware Manual page 237

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Clock source for watchdog timer specifying function
The clock source for the watchdog timer can be specified with the watchdog timer clock source
selection bit (WDCS) of the WTC register. If the sub-clock is used as the machine clock, set the
WDCS bit to "0" and select the output of the watch timer. If the mode transits to the sub-clock
mode with the WDCS bit setting to "1", the watchdog timer stops.
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Sub-clock oscillation stabilization wait time function
For a power-on reset, restoration from the stop mode or the watch timer functions as the timer
for the oscillation stabilization wait time of the sub-clock. The oscillation stabilization wait time of
the sub-clock is fixed at 2
14
cycles of the sub-clock.
CHAPTER 11 WATCH TIMER
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