Fujitsu MB90480 Series Hardware Manual page 253

F2mc-16lx 16-bit microcontroller
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If CMOD = 1, compare register 0 (2/4) inverts the output level in the same manner as in
cases where CMOD = 0; however, the pin OUT1 (OUT3/OUT5) output level corresponding
to compare register 1 (3/5) inverts the output level only when both compare register 0 (2/4)
and compare register 1 (3/5) have a match. Also, if compare registers 0 (2/4) and 1 (3/5)
have the same value, the operation is the same as that for one compare register.
- OUT0/2/4: Level is reversed if a match for compare register 0/2/4 is found
- OUT1/3/5: Level is reversed if a match for compare register 0/2/4 and 1/3/5 is found
[bit11, bit10] OTE1, OTE0
These bits permit pin output of output compare. These bits take an initial value of "0".
0
General-purpose support (initial value)
1
Operate as pin output of output compare
OTE1: Corresponds to output compare 1/3/5
OTE0: Corresponds to output compare 0/2/4
[bit9, bit8] OTD1, OTD0
These bits change the pin output level if pin output of output compare is permitted. The initial
value of compare pin output is set to "0". A write operation must be performed after the
compare operation stops. In a read operation, the output value of the output compare pin is
read.
0
Compare pin output set to "0" (initial value)
1
Compare pin output set to "1"
OTD1: Corresponds to output compare 1/3/5
OTD0: Corresponds to output compare 0/2/4
[bit7, bit6] ICP1, ICP0
These bits are the interrupt flags for output compare. Set them to "1" if the compare register
and free-running timer have matching values. If the interrupt request bit (ICE1, ICE0) is set
to "enabled", and this bit is set, an output compare interrupt occurs. This bit is cleared if "0" is
written. Writing "1" has no effect. An instruction of the read-modify type only reads "1".
0
No compare match (initial value)
1
Compare result match
ICP1: Corresponds to output compare 1/3/5
ICP0: Corresponds to output compare 0/2/4
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
231

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