8/16-Bit Composite Timer Timer Mode Control Register (Tmcrn) - Fujitsu MB95630H Series Hardware Manual

MB95630H Series
11.14.3 8/16-bit Composite Timer Timer Mode Control
Register (TMCRn)
The 8/16-bit composite timer timer mode control register (TMCRn) selects the
filter function, 8-bit or 16-bit operating mode, and signal input to timer n0 and
indicates the timer output value. This register serves both timer n0 and timer
n1.
■ Register Configuration
bit 7
Field TO1
Attribute R
Initial value 0
*: This R/W attribute is only for ch. 0. For other channels, the R/W attribute is W.
■ Register Functions
[bit7] TO1: Timer n1 output bit
This bit indicates the output value of timer n1. When the timer starts operation (Tn0CR1/Tn1CR1:STA = 1),
the value in the bit changes depending on the timer function selected.
Writing a value to this bit has no effect on operation.
In 16-bit operation, if the PWM timer function (variable-cycle mode) or the input capture function is
selected, the value in the bit becomes undefined.
With the interval timer function or the PWC timer function having been selected, if the timer stops operating
(Tn0CR1/Tn1CR1:STA = 0), this bit holds the last value.
With the PWM timer function (variable-cycle mode) having been selected, if the timer stops operating
(Tn0CR1/Tn1CR1:STA = 0), this bit holds the last value.
When the timer operating mode select bits (Tn0CR0/Tn1CR0:F[3:0]) are modified with the timer stopping
operating, this bit indicates the last value of timer operation if the same timer operation has been performed;
otherwise it indicates its initial value "0".
[bit6] TO0: Timer n0 output bit
This bit indicates the output value of timer n0. When the timer starts operation (Tn0CR1/Tn1CR1:STA = 1),
the value in the bit changes depending on the selected timer function.
Writing a value to this bit has no effect on operation.
If the input capture function is selected, the value in the bit becomes undefined.
With the interval timer function or the PWC timer function having been selected, if the timer stops operating
(Tn0CR1/Tn1CR1:STA = 0), this bit holds the last value.
With the PWM timer function (variable-cycle mode) having been selected, if the timer stops operating
(Tn0CR1/Tn1CR1:STA = 0), this bit holds the last value.
When the timer operating mode select bits (Tn0CR0/Tn1CR0:F[3:0]) are modified with the timer stopping
operating, this bit indicates the last value of timer operation if the same timer operation has been performed;
otherwise it indicates its initial value "0".
MN702-00009-1v0-E
6 5
TO0 TIS
R R/W*
0 0
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 11 8/16-BIT COMPOSITE TIMER
4 3
MOD FE11
R/W R/W
0 0
11.14 Registers
2 1
FE10 FE01
R/W R/W
0 0
0
FE00
R/W
0
167