Hitachi H8S/2633 Hardware Manual page 564

Contention between Compare Matches A and B

If compare match events A and B occur at the same time, the 8-bit timer operates in accordance

with the priorities for the output statuses set for compare match A and compare match B, as shown

in table 13-4.

Table 13-4 Timer Output Priorities

Output Setting

Toggle output

Switching of Internal Clocks and TCNT Operation

TCNT may increment erroneously when the internal clock is switched over. Table 13-5 shows the

relationship between the timing at which the internal clock is switched (by writing to the CKS1

and CKS0 bits) and the TCNT operation.

When the TCNT clock is generated from an internal clock, the falling edge of the internal clock

pulse is detected. If clock switching causes a change from high to low level, as shown in case 3 in

table 13-5, a TCNT clock pulse is generated on the assumption that the switchover is a falling

edge. This increments TCNT.

The erroneous incrementation can also happen when switching between internal and external