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19.2.3
A/D Control Register (ADCR)
Bit
:
TRGS1
Initial value
:
R/W
:
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion operations and sets the A/D conversion time.
ADCR is initialized to H'33 by a reset, and in standby mode or module stop mode.
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): Select enabling or disabling of
the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0 while conversion
is stopped (ADST = 0).
Bit 7
Bit 6
TRGS1
TRGS0
0
0
1
1
0
1
Bits 5, 4, 1, and 0—Reserved: They are always read as 1 and cannot be modified.
Bits 3 and 2—Clock Select 1 and 0 (CKS1, CKS0): These bits select the A/D conversion time.
The conversion time should be changed only when ADST = 0.
Set bits CKS1 and CKS0 to give a conversion time of at least 10 µs when AV
least 16 µs when AV
Bit 3
Bit 2
CKS1
CKS0
0
0
1
1
0
1
7
6
TRGS0
0
0
R/W
R/W
Description
A/D conversion start by software is enabled
A/D conversion start by TPU conversion start trigger is enabled
A/D conversion start by 8-bit timer conversion start trigger is enabled
A/D conversion start by external trigger pin (ADTRG) is enabled
< 4.5 V.
CC
Description
Conversion time = 530 states (max.)
Conversion time = 266 states (max.)
Conversion time = 134 states (max.)
Conversion time = 68 states (max.)
5
4
—
—
CKS1
1
1
—
—
R/W
3
2
CKS0
0
0
R/W
≥ 4.5 V, and at
CC
1
0
—
—
1
1
—
—
(Initial value)
(Initial value)
753
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